Error Simulation Enviroment For The Dicode Pulse Position Modulation Essay

Error Simulation Enviroment For The Dicode Pulse Position Modulation - Essay Example The number of erasure error symbols that is erased is within the capacity of the decoder in his recovery of the original data. In this test design, the number of erasure error symbols must be less or equal to 8 symbols per codeword. Figures (7.2) & (7.3) show the system input/output signals. Figure (7.2) shows the performance of the system when the number of erasure symbols equals 8 per codeword, while the figure (7.3) displays the system signals when the number of erasure symbols equals 5. In these figures, the fail output signal is logic 0. This means that the system has successfully decoded the original codeword. We can add or delete erasures by updating lines 294 and 295 inside the code. The number of erasure error symbols that is erased is greater than the capacity of the decoder to recover the original data. In this test design, the number of erasure symbols is greater than 8 symbols per codeword. Figure (7.4) shows the system input/output signals when the number of erasure sym bols equals 9 per codeword. In this figure, the fail output signal is logic 1, which means that the system has failed to decode the original codeword. We can add or delete erasures by updating lines 294 and 295. A VHDL test bench program Appendix ( ) has been built to provide an environment where errors can be injected into the system. According to equation (6.7), the designed system has the ability to correct up to 4 erasure errors only. Above this number, the system will fail to decode the original message.